COMPUTER ORGANIZATION BITS IMPORTANT FOR INTERNALS
1. Transfer of data under --- is between cpu &
peripheral
[ ]
a) programmed I/O b) Interrupt Initiated I/O c) DMA
d) none
2. Data transfer
modes are ___________ [ ]
a) programmed I/O b)Interrupt Initiated I/O c) DMA
d) none
3. The command
field corresponds to an operation code that specifies ___ basic types of I/O
operation . [
]
a) 2 b) 4 c) 6 d) 8
4. The operation s performed on the data in the processor
constitutes a _________ stream [ ]
a) Instruction b) data c) both d)none
5. Flynn’s classification divides computer into ___ major
groups
[ ]
a) 1 b)2 c) 3 d) 4
6. Multi
processors are classified into ______ types. [ ]
a) tightly coupled b) loosely coupled c) both d)
none
7. A measure used
to evaluate computer in their ability to perform a given number of floating
–point operations per second is referred as ----- [
]
a) byte b) bit c) flops d) none
8. The packet consists of ________ [ ]
a) address b) context c) error detection code d) all
9. In UART “R”
means _______
[ ]
a) radio b) receiver c) repeat d) none
10. The mapping function is implemented by a special
memory Control circuit , often called the ____ circuit.
[ ]
a)controlunit b)main memory
c)memory management unit d)none
11) Expand DVD ____________
[ ]
a)digitalvrtual device b)
DIGITAL
VERSATILE DISK c)digital videodisk d)digital videodisk
12) Instruction that are read from memory by an IOP are
sometimes called __________
[ ]
a)code b)commands c)a&b
d)none
13) Array processors are ------- types
.
[ ]
a) 1 b) 2 c) 3
d) 4
14) ---- interrupt, the source that
interrupts supplies the branch information to the computer. [ ]
a) vector b)
non vector c) both d) none
15) In ASCII code ------ control
characters .
[ ]
a) 33 b) 46 c)
128 d) 95
16) DMA controller has -------- registers
.
[ ]
a) 1 b) 2 c) 3
d) 4
17) The -------- register holds the
number of words to be transferred
[ ]
a)number count
b)word count c)single countd)all
18) The ----- channel is designed to
handle one I/O operation at a time . [ ]
a)processor
b)vector c)selector d)none
19)Computers
are interconnected with each other by means of communication lines to form a
---[ ]
a)LAN b)WAN
c)computer network d)all
20) Each processor element in a --------
system has its own private local memory [ ]
a)looselycoupled
b)tightly coupled c)single d)multi coupled
21)Input or output devices attached to the computer are also
called ----- [ ]
a)peripherals b)connections c)a&b d)none
22) The command that causes the interface
to respond by transferring data from the bus into one of its registers
is____________
[ ]
a) control command b) status command c) data output command
d) data input command
23) In polling, the drawback is___________
[ ]
a)cost is more
b) complex hardware is required
c) time consuming
d) maintenance is more
24) The inter process communication
mechanism used in tightly coupled system is___________ [ ]
a) shared
memory b) FIFO c) pipes d) message queues
25) The IEEE 796 standard bus has _______
data _______address and________ control lines. [ ]
a)36,24,36
b)10,24,30 c)16,24,26 d)16,20,20
26) The RISC consists of
only_______________ length instruction format. [ ]
a) variable b)
fixed c) small number d) large number
27) The function of the master control
unit in SIMD processor is to ___________the instruction. [ ]
a) fetch b)
decode c) execute d) store
28) In the Memory Hierarchy, the
following Memory has maximum access time [ ]
a) register
b)primary memory c)cache d)Magnetic tape
29) Boot strap loader
requires_____________
[ ]
a) RAM b)ROM
c) Any Memory d) Only Processor
30) Replacing the page that entered the
memory at first is____________ [ ]
a) FIFO b)LRU c)MRU d)LFU
1)A
2)D
3)C
4)B
5)D
6)C
7)C
8)D
9)B
10)C
11)B
12)B
13)B
14)A
15)A
16)C
17)B
18)C
19)C
20)A
21)A
22)C
23)C
24)A
25)C
26)B
27)B
28)D
29)B
30)A
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